The present invention pertains to the electrical circuit testing art and, more particularly, to a method and apparatus for automatically testing each node of a multi-node circuit.
With the development of complex electronic circuitry, a need has arisen for automatic testing apparatus which is capable of circuit fault locating in a reliable manner. One application for such testing equipment is in the commercial aircraft art wherein, for example, a single aircraft may employ three inertial navigation systems (INS). Each such system is extremely complex and costly. It is important, therefore, that the aircraft circuitry to which the INS system connects be properly wired. The checkout of the INS aircraft wiring has heretofore involved service by a technician who, using manual probes and a meter, takes measurements across various pin locations. Since there can be as many as 360 pins connecting to the INS, such testing has been timeconsuming and laborious. In addition, the possibility has existed of the technician inadvertently shorting contacts during testing with resultant circuit damage.
Numerous automatic testing systems have been known in the prior art. Modern circuit testers employ small computers which, via suitable programming, cause selected circuit-under-test points to be connected to a multimeter. The meter, then, gives an indication of the particular electrical characteristic which is being checked.
The automatic circuit testing systems known to the prior art have several limitations which render them unsuited for certain types of testing, such as of the INS airplane wiring system discussed above. For example, such prior art systems, even though they are under computer control, are capable of a limited scope of testing, e.g. may check only for continuity. These prior systems are incapable of performing comprehensive testing of complex circuits wherein each test point may have on it either DC, AC, AC on DC, digital or noise signals and, further, wherein circuit point-to-point measurements are desired. In addition, prior art circuit testing systems often caused test points on the circuit under test to be shorted together. This is particularly undesirable in the testing of circuits such as of the INS type, since a high voltage appearing at one pin might result in substantial equipment damage if shorted to other circuit pins.